The Enterprise and High Performanc Group (EHPG) within Intel’s Data Center Group defines, delivers, and markets products that are critical to customers in Government, Academia, and Industrial market segments of the High Performance Computing and Workstation markets. These products help end customers gain insight into and discover solutions to their most important problems. EHPG products enable a broad range of breakthroughs: from scientific discovery, to computational engineering, to success in investment banking, to breakthroughs in manufacturing from small businesses to the largest industries.
You will be part of HPC system architecture and pathfinding team developing leading edge HPC technologies. Responsibilities include simulation and analytic modeling of parallel applications, and studying how proposed new CPU architecture and network features impact application performance and power consumption. The focus of the work includes:
HPC Workloads: understanding workload behavior including instruction mixes, memory footprint and cache behavior, floating point and vector characteristics, multithreading and distributed memory characteristics including (but not limited to) MPI, OpenMP and emerging programming models.
Simulation: using several different simulators, including Asim-based microarchitectural simulators, and Sniper-based multicore simulators, Intel’s SDE software development emulator, and others. Analyzing simulator output including stats files, pipe traces, and other output. Preparing simulator input including trace files, execution state snapshots, binary executables and their inputs and setup scripts.
Performance and Power Analysis: Preparing simulation result data for presentation. Analyzing a variety of simulation and analytic data, and correlating results from different tools and simulators.
Inside this Business Group
You must possess the minimum qualifications below to be initially considered for this position. Qualifications listed as preferred or additional will be considered a plus factor for applicants. Experience can be demonstrated through academic work or industry experience.
• PhD in CS or Engineering with at least 3 years of relevant industry experience.
• Architecture knowledge in one or more of the following areas: pipelined or vector processors, accelerators, cache memory hierarchies, on-die interconnects, high-performance memory systems
• At least 12 months experience developing or using performance simulators
• At least 6 months experience in parallel programming using openMP, pthreads, TBB, Cilk+, MPI, UPC, co-array Fortran, or similar
• At least 2 years of programming experience in high level languages such as C/C++/Fortran and scripting languages such as perl, python or bash
• At least 3 months experience in the use of performance profiling tools such as VTune, Vector Advisor, MPI profilers or HPC toolkit
Additional Preferred Qualifications:
• Knowledge of HPC or datacenter architectures
• Familiarity with x86 and SSE or AVX vector instruction extensions
• Experience with instruction set or multiprocessor simulators such as Asim, Gem5, Sniper, Graphite, SST or similar
• Queuing theory and development of analytical models
• Computational math, numerical methods and linear algebra
• Excellent analytic and communication skills. Ability to prepare data for presentation in PowerPoint or similar, or written reports, and presenting the data to a group.
This position involves work on a U.S. Government contract which may impose certain security requirements: If you are a U.S. citizen, the government may require that you certify that you are a U.S. citizen. If you are not a U.S. citizen, the government may require you to pass a security check before you can be approved to work on the project.
Please note that any offer by Intel for this position is conditioned upon meeting and/or passing the U.S. government’s security check requirements should the government impose these requirements.