DVM (Devices Validation and Manufacturing) is a vertical organization within MVE (Manufacturing and Validation Engineering) that provides leadership and integration across MVE horizontal teams for pre-silicon and post-silicon system-level validation, back end manufacturing, and productization of Device Products. The Sysdebug leader chairs the Sysdebug forum, and is responsible to lead a team of experienced system validation engineers, in the coordination and execution of all aspects of post-silicon debug activities for SoC products. This includes ensuring timely disposition of all incoming sightings, assessing firmware / software workaround as well as silicon fixes options. The successful candidate must be able to perform detailed analysis of the issues, provide qualitative and quantitative input, provide risk assessments and make recommendations to program level forums such as Mission Control. Must be able to work effectively with cross functional teams such as Silicon Design, Platform design, Platform validation, SW/FW, PnP, PPV, CMV, SV, EV and PnP teams. Requires broad understanding of multiple system architecture, SoC DFx/validation methodologies, and emulation/FPGA technologies. The successful candidate must be willing to work with teams across multiple geographical locations and have hands-on involvement in team activities.
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.