Come and join us! Intel is seeking highly qualified candidates to join our Data Center Group (DCG) as a Network Software Development Engineer!
As a Network Software Development Engineer you will work with the Silicon design team to understand HW/SW interfaces and HW offload tradeoffs for open protocols such as OVS. In any packet processing layer such as OVS, there are always certain areas that has the maximum impact on performance – it could be flow caching, storing flow state for many flows efficiently, or executing match/action rules on many flows. In collaboration with ASIC engineers, you will evaluate the possibility of designing and adding HW acceleration for these areas. You will also adapt open source code to enforce these HW/SW separations and will develop embedded SW code to interface with the HW. You will explore, understand and debug performance issues using both industry-standard tools as well as internally developed tools.
In this position you will gain invaluable experience which will allow growth and expanded opportunities within this business group as well as future possible opportunities with other business groups within Intel.
The Data Center Group (DCG) drives new products technologies from high-end co-processors for supercomputers to low-energy systems for enterprise and the cloud, as well as solutions for big data and intelligent devices. The group is a worldwide organization that develops the products and technologies that power nine of every 10 servers sold worldwide.
Inside this Business Group
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Required Qualifications:
Bachelor Degree in Computer Science, Computer Engineering, or related discipline with 4+ years of work experience, a Masters in Computer Science, Computer Engineering, or related discipline with 3+ years of work experience, or a PhD in Computer Science, Computer Engineering, or related discipline.
- 4 plus years of experience writing low-level software and/or firmware for SmartNIC solutions or other networking products.
- 3 plus years of experience and knowledge of porting OVS, DPDK etc. on newer platforms such as ASIC, FPGA or a new general purpose processor.
- 3 plus years of experience and understanding of debug performance bottlenecks in network packet processing.
Additional Preferred Qualifications:
- Knowledge of FPGA programming and Altera/Intel FPGA tools will be a plus
- Experience in programming SmartNIC ASICs is a plus
- Excellent interpersonal and communication skills to be able to work as part of a multi-site team
- Ability to work independently and proactively
- Good problem analysis and solving skills coupled with a strong drive to learn new skills and teach others