Join the 5G mobile revolution at Intel as part of the Next Generation and Standards group. As a member of the SOC/ASIC Design team, you will have responsibilities across all phases of SOC design. Including micro-architecture specification, design, and debug of complex logic for high performance, and low power design targets.
You will own all aspects of development of SOC blocks, Internal and external IP integration, and interface control logic. This role will interface with other internal and external design groups. Participate in design/architecture reviews, work with DV team towards pre-silicon verification and flow automation, emulation and engage in post-silicon bring up activities. Scripting and programming experience using Perl, TCL, and Make.
- BSEE/MSEE and at least 10+ years’ experience with the following:
- Verilog RTL Logic Design
- RTL IP Integration
- Full chip RTL Integration and release process for multi-million gates SoCs/ASICs
- Perform full chip Front End Integration tasks including: IP and subsystem integration, Lint, CDC, Synthesis, equivalence checking.
-Experience with at least one of the following: processor integration, system bus integration, DDR controllers, or PCIe.
- Experience with Multiple Clock Domains and Asynchronous Interfaces.
- Familiarity with automated front end design flows
- Proficient with scripting Languages like Gmake/Perl/Tcl/Python.
Inside this Business Group
Intel is one of the largest suppliers of chips for the communications market. The Intel Communications group is focused on designing and building communications technologies such as Ethernet connectivity products, optical components, communications processing solutions and broadband products.