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Job ID: JR0007020
Job Category: Intern/Student
Primary Location: Folsom, CA US
Other Locations:
Job Type: Intern

NSG Graduate Technical Intern 2017

Job Description
Candidate will be part of the NAND memory design group working on Analog, Mixed-signal & I/O circuit design and validation. Job assignments are for a minimum of 6 months


Minimum Qualifications: - Must be pursuing a MS degree in Electrical Engineering and/or Computer Engineering- Strong academic background required in CMOS semiconductor device physics and silicon processing.- Relevant coursework in CMOS digital, analog, and I/O circuit design- Knowledge of transistor-level circuit simulation tools such as SPICE, Verilog, etc.Additional qualifications include- Familiarity with CMOS transistor and semiconductor device layout methods- Experience using custom design environments such as Cadence Virtuoso- Knowledge of DRC, LVS, and post-layout extraction tools- Proficiency in UNIX and strong programming skills using Perl, TCL, etc.- Project work using device modeling tools such as hsim, Ultrasim, etc- Knowledge of RTL Design using Verilog, system Verilog is a plus although not required- Good communication and leadership skills

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