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Job ID: JR0003667
Job Category: Engineering
Primary Location: Austin, TX US
Other Locations:
Job Type: Experienced Hire

HVM reset and testing development engineer

Job Description

Our group is at the forefront of product enabling inside of Manufacturing Validation Engineering MVE. After years of product design, the very first time that silicon arrives, the test strategies, methods, DFT that you help create and validate are put to the test on live silicon on an ATE tester. The team supports products from cradle to grave. Engagement by this team is often year or two ahead of the rest of the organization in crafting out test strategies with the design team and carries through the debug/triage of early silicon / prototypes and ends with a healthy product going into high volume manufacturing. In this position, you will be supporting the upcoming MIC products as a Product Development Engineer. This group architects the silicon-friendly test flows and boot/pll warmup and functional test sequences that will be used for test coverage content on the ATE digital testers in product debug and manufacturing screens. An ideal candidate would exhibit behavioral traits that indicate: - Outstanding verbal and written communication skills - A hands-on individual who enjoys innovating, pathfinding, and ad hoc experiments - Debug Pre-silicon and Post-silicon environments.


Qualifications

Desired Qualifications:

- Must have at least a BS or MS in Electrical Engineering, Computer Engineering or Electrical and Computer Engineering
- Minimum 3 years experience with PC Architecture
- Minimum 3 years experience with general test methodologies: structural and functional test types on ATE testers - Minimum 3 years experience with OVM/Saola/Specman/ E-code, RTL simulations, JTAG/TAP and DFT techniques
- Minimum 3 years experience with UNIX* and/or DOS and data analysis via Excel* and/or JMP*
- Minimum 3 years experience with one or more high level programming languages i.e., C++, Python, PERL
- Minimum 3 years experience with coverage test methodologies, DFx features and basic software programming Preferred qualifications
- 3+ years experience with ATE tool platforms

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.


Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
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