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Job ID: R10008875
Job Category: Engineering
Primary Location: San Jose, CA US
Other Locations:
Job Type: Conversion

SERDES Validation Engineer

Job Description

As part of Intel, we will continue to apply Moore’s Law to drive the future of field-programmable gate array (FPGA) technology.  The Programmable Solutions Group (PSG) has been delivering industry-leading custom logic solutions to customers since inventing the world's first reprogrammable logic device in 1984.  In order to take advantage of the many opportunities that we see in the future for FPGA’s, PSG is looking for great engineers to join our team.

As a Validation Engineer in the Product Engineering team, you will be validating and characterizing the performance of Altera's transceiver (SERDES) products for Ethernet applications covering per channel rates of 1G-56G. Validation includes both PHY and MAC functions.

o            Research and develop validation test methodologies for PMA, PCS blocks and functions and execute validation to support Ethernet protocols and intrinsic performance up to 56 Gbps per channel for custom bench setups

o            Analyze test results and identify potential issues, debug and root cause to produce optimal transceiver performance

o            Generate test plans and characterization reports for both internal and external customers to clearly illustrate performance PHY and MAC blocks

o            Rollout transceiver features with cross-functional teams spanning IC Design, SW & IP, Applications and Marketing for NPI from initial bring-up to full production

In this role, you will be exposed to leading edge SERDES technology, tools, test equipment, and FPGA products. You must be willing to use your strong analytical, problem-solving and debugging skills to validate Altera's transceiver solutions. You must have excellent communication, documentation, presentation skills, and the ability to work/collaborate cross-functionally.


Qualifications

Minimum Qualifications:
-BS in Electrical Engineering or equivalent
-Minimum of 10 or more years of experience in transceiver/SERDES validation, characterization or design
-Expertise in Ethernet protocol for 100G, PMA, PCS and MAC layer and associated debug
-Strong hands-on experience with protocol analyzers, high-bandwidth oscilloscopes, BERTs and associated lab equipment for SERDES characterization
-Experience in RTL design for FPGAs, scripting languages, and bench automation

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.


Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
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