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Job ID: JR0005105
Job Category: Engineering
Primary Location: Leixlip, IE
Other Locations:
Job Type: Experienced Hire

FSM Quality & Reliability Technologist

Job Description
New Markets Technologist OwnershipThis person will be the FSM Q&R ICF/Automotive DPM program owner collaborating with TD/PDE/MVE/Div/CQ&R to implement appropriate Quality Systems to enable healthy QS/PRQ start-up and sustaining low outgoing DPM for these products lines during HVM. This person will help define Qual/Cert for new ICF/Automotive dot processes with ICF/Div Q&R and LTD Q&R. He/She will also work to ensure we have a high level of cadence responding to Automotive Customer issues by collaborating and Technical problem resolution and continuous improvement programs within Fab teams. Partnering with FA/FI / Division, Customer Q&R on resolving customer issues and ensuring close loop resolution between manufacturing groups back to the Customer. This person will also support technical aspects of Automotive Customer audits in partnership with TS16949/ISO Program Managers.Defect Reliability- IM Screening:Support IM DPM improvement across Intel 14nm/10nm Manufacturing technologies. Own and drive comprehensive screening methods through implementation of robust high voltage quick kill test content at Wafer Sort, Die Sort and Class test.Collaborate with STTD/SORT manufacturing to enable better ways/cost effective SORT screens DFX, patterns, coverage...Establish and drive strong partnership between Sort WG's / PDEs and CQN on impact to STTD costs, partner on solutionsWork with STTD/PQRE/MVE for addressing MTR methodology issues across all the technologiesEnsure HVQK strategy for TD Q&R and STTD aligned for products within technologyCoordinate the product assignment inside FSM Q&R make sure that each product has a SORT PDE, FSM QRE and product QRE assigned for successfully HVQK implementationCoach for technology HIETs that still have active development ensure alignment of overall HVQK implementation in all the products across technologyOwn L1/L0 Excursion issue management risk assessment for FSM and collaborate with CQN/TMG partners on Si disposition recommendations.


Candidate should have a minimum of a BSc in Electrical Engineering/Physics or related field with 10+ years of relevant experience in Fab Yield, Q&R or Test engineering/management. Candidate should have strong knowledge of Intel test methods, strong data analysis, scripting and technical problem solving skills, and be capable of project management oversight. Knowledge of silicon defect reliability on contemporary technologies is preferred. Good communication written and verbal skills are essential, as is ability to work in a flexible manner with stakeholders around the world. Must be able to make informed decisions on defect reliability screening robustness, and interface with key stakeholders to arrive at clear action path. This person Contributes to the development of new principles and concepts across TD-Mfg Q&R Effects strategic plans and communicates in ways that lead to changeRecognizes opportunities outside current project scopes and pursues them to return unexpected benefits to Intel Corporation They will Expert at simplifying complex information Develop novel tools/techniques to effect meaningful change to standard ways of doing business They will drive effective resolution of issues across technical, business, and political boundaries demonstrates high degree of business acumen. Responsible for creating and delivering technical training courses and Mentoring pipeline Engineers

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