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Job ID: R10009743
Job Category: Engineering
Primary Location: San Jose, CA US
Other Locations:
Job Type: Conversion

Sr. CAD Engineer, Power Integrity & Methodology

Job Description

As part of Intel, we will continue to apply Moore’s Law to drive the future of field-programmable gate array (FPGA) technology.  The Programmable Solutions Group (PSG) has been delivering industry-leading custom logic solutions to customers since inventing the world's first reprogrammable logic device in 1984.  In order to take advantage of the many opportunities that we see in the future for FPGA’s, PSG is looking for great software engineers to join our team.

As a staff CAD engineer, you will be pioneering/developing and supporting our next generation Power Analysis & Integrity Flows. You will also drive and come up with productive methodologies for our PnR/Analog/Custom and full chip design teams.  Your specific responsibilities will include but are not limited to following:

  • Develop repeatable and predictable Power EMIR and Signal EM Analysis flow.
  • Drive improvements in our current IR/EM analysis methodologies.
  • Develop a hierarchical flow to enable large design analysis with reasonable runtime
  • Work with the timing team to develop an IR aware static timing analysis flow.
  • Assist in creating a dashboard and a regression system to track QnR convergence.
  • Develop a flow to integrate the package model to perform system level Power Integrity analysis.
  • Engage in tool evaluations to ensure we always have a best in class EMIR tool/flow/methodology.
  • Driving flow validation methodology and deployment for quality and efficiency
  • Interfacing with internal customers and vendors effectively
  • Engaging in strategic roadmap development with key EDA vendors and other design stakeholders.


Minimum Qualifications:
• MSEE plus 7 years of relevant experience

Preferred Qualifications
• Good experience in UNIX and Scripting Languages such as Python, TCL and perl.
• In-depth knowledge in industry leading tools, like Redhawk, Voltus as well as Totem and Voltus-Fi.
• Expertise in using scripting languages like Tcl, Perl, Shell, and/or Python.
• Setting up and maintaining CAD flows.
• Dynamic circuit simulation
• Library characterization for EMIR
• Physical design
• Static timing analysis
• Flow regression testing and release
• Power estimation and optimization
• Package modelling and package level analysis.

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
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