Creates, defines and develops system validation environment and test suites. Uses and applies emulation and platformlevel tools and techniques to ensure performance to spec. Responsible for the development of methodologies, execution of validation plans, and debug of failures. Requires broad understanding of multiple system areas and requires interfaces with Architecture, Design, and Presilicon Validation teams in improving postsilicon test content and providing feedback for future ondie debug features.
Inside this Business Group
You must possess a Bachelor of Science degree in Electrical Engineering and/or Computer Science with 3+ years of relevant post-si validation experience.
Knowledge of Computer System Architecture - Understanding of a subsystem HW/SW stack, including the silicon, all onboard HW components and connectors and devices, drivers, and applications - Experience with C and/or C++ programming, Python - Ability to independently read specifications, identify interesting test cases, document them, and implement them - Experience with debug of Intel chipsets and/or CPUs - Knowledge of and experience with logic analyzers, oscilloscopes, protocol analyzers, in-target probes(ITP) and Lauterbach (LTB) - Excellent technical and problem solving skills - A team player with good organizational and/or planning skills and solid verbal and/or written communication skills - Highly motivated, curious, and have good lab skills (proper tool use, detailed note taking), and be keenly interested in finding and resolving silicon failures
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.