The microprocessor has driven the digital revolution, dramatically transforming the way we live, work, and play. As a coherency fabric IP validation manager, you will have an integral role in leading a technical team designing and delivering innovative coherent fabric architectures with rich feature sets to deliver higher levels of performance, energy-efficiency and value that form the computing backbone of the connected world.
In this position, you will be a validation manager in the pre-silicon IP validation team in Intel's Scalable Performance CPU Development Group (SDG).
You will be responsible for validating the CPU coherency fabric design IP for high-end, server-oriented computing products.
Your responsibilities will include but not be limited to:
Team's deliverables include:
Validation of server features in cluster test environments
The ideal candidate will be able to demonstrate the following behaviors:
BS or MS in EE, CS, or Computer Engineering - 10+ years of hands-on experience and a track-record of success in pre-silicon validation to provide basis for management judgment and schedule management
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.