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Required -At least a Master of Science degree in Electrical Engineering/Computer Engineering/Computer Science, with at least 3 years of PDE experience -Bachelor of Science degree in Electrical Engineering/Computer Engineering/Computer Science, with at least 5 years of PDE experience In addition to the required qualifications, the ideal candidate would have many or all of the following skills: -Knowledge/course work in semiconductor device physics, fundamentals of testing, digital electronics principles, microprocessor basics, basics of VLSI design, assembly language programming, computer architecture, data structures, statistical data analysis -Very strong software background & programming skills (C++, Perl, Python, any scripting language) -Problem solving with sound logical thinking and analysis -Excellent communication skills, verbal and written -Prior experience in logic device testing at wafer sort/packaged parts -Prior experience/exposure to high volume manufacturing This position is for a Sort Test Program Architecture Product Development Engineer (PDE) in the Manufacturing Validation Engineering (MVE) within Platform Engineering Group (PEG). In this role, you will be expected to be a part of and participate in global PDE teams in developing wafer-level sort test programs to enable TD's process development and Intel's product roadmap for products on the lead process. The responsibilities of this position include, but are not limited to, the following: -Performing evaluation, development, and debug of new test methods and methodologies -Development of test program flows, working with the module owners and senior test program architecture PDE to build test program from definition, through integration and validation, to release in HVM environment -Development and debug of software tools to support sort/class test program development -Strong participation and active contribution to global working groups dedicated to identifying and meeting current and future test challenges -Statistical analysis of tested parameters and working with partner organizations to define optimal sort/class test pass/fail criteria -Provide debug support, working with module/content owners on the tester platform -Data analysis and deployment of solutions to improve test coverage, yield, hardware capacity, and other product health indicators -Keen attention to details, with a conscious focus towards efficiency and convergence via sort/class test methodologies, standardization, and proliferation of best practices across products and product segments
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.