Creates, defines and develops system validation environment and test suites. Uses and applies emulation and platform-level tools and techniques to ensure performance to spec. Responsible for the development of methodologies, execution of validation plans, and debug of failures. Requires broad understanding of multiple system areas and requires interfaces with Architecture, Design, and Pre-silicon Validation teams in improving post-silicon test content and providing feedback for future on-die debug features.
Responsible for validating the functionality of Intel Xeon Cores in emulation and post-silicon validation environments.
Inside this Business Group
A BS\MS\ME degree in Hardware Engineering or Computer Engineering or Computer Science -3-10 years of experience in the industry, preferably chip and/or system Validation -A precise attention to details -People skills and team spirit -Familiarity with Emulation environment and tools -Knowledge of Server and SoC platform architectures -Knowledge of post silicon validation and debug tools flows and methods -Knowledge of Python SV scripting and C or C++ validation content development -Familiarity with debug tools ITP, LTB and DCI interfaces a plus.
CPU micro-architecture including knowledge of areas such as out-of-order execution, processor pipelines, Memory load and store, Cache Coherency, Paging, Microcode etc.
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.