Analyze the electrical performance of all client IOs/interfaces: PCIe, USB, SATA, UFS, eMMC, Soundwire, etc. Provide design constraints for and guide implementation of component packages and boards to meet timing and signal quality targets. Collaborate with silicon IP providers, especially IO and PLL circuit designers, on acceptable electrical targets. Provide guidance to OEM & ODM customers on their board implementations via Platform Design Guide (PDG).
Inside this Business Group
1. Bachelor or Master Degree in Electrical Engineering with minimum 5 years of experience in signal integrity design, analysis and lab verification of the simulation results, strong knowledge in signal integrity theories and fundamentals. 2. Familiar with IO industrial specifications, HSPICE and other high speed IO modeling tools, posses knowledge of multi-gigabits channel analysis methodologies. 3. Experienced in high speed scopes, VNA and TDR measurement. 4. Familiar with Allegro PCB design tools knowledge. 5. Knowledge of scripting language such as Perl and Matlab is a plus.
The Client Computing Group is responsible for all aspects of the client computing business across Phone, Phablet, Tablet and PC platforms, leading Intel's efforts to transform client computing through technologies, new form factors, and driving Intel's corporate-wide user experience initiatives. This spans all client device brands including hardware, software and connectivity ingredients for phones, tablets, Ultrabook™, All-in-Ones, 2 in 1 computing devices, and home gateways.