In this role, you will be a part Intel PSG Team. You will be involved in physical implementation of blocks across multiple process technology nodes. The work is performed with broadly defined parameters, and assignments are often complex and nonstandard in nature. Your responsibilities will include but not be limited to: - Independently assess and drive complex digital physical design assignments. - Work closely with circuit design engineers to interpret schematics and drive physical implementation.- Work interactively and proactively with our CAD team to debug tool functionality and bugs.- Build and verify all levels of physical design hierarchy (leaf cell, IP block, compiler)- Collaborate closely with SoC projects at various sites across Intel.
Inside this Business Group
MSEE/CE or PHD with detailed knowledge of VLSI/Digital design with minimum 10+ years of experience.
The candidate should be a good team player and motivated to take up challenging tasks.
Solid Understanding of Physical Design Flow.
Must have previous experience with Full Chip Flows (EMIR, Physical Verification, Timing Closure). Previous TO experience would be a plus.
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.