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Job ID: JR0813676
Job Category: Engineering
Primary Location: Hillsboro, OR US
Other Locations:
Job Type: Experienced Hire

Power Management Architect

Job Description
Position Duties:Determines, specifies and evaluates the viability of complex hardware features and structures and ensures that software and hardware designs interface correctly. Designs framework for particular functions. Defines, documents and tests processes for inclusion into technical platforms, sub-system specifications, input/output and working parameters for hardware and/or software compatibility. Identifies, analyzes and resolves sub-system and/or SoC design weaknesses. Influences the shaping of future products by significantly contributing to the architecture used across design families. Provides multi-layered technical expertise for next generation initiatives. In this position, you will be responsible for developing CPU Power Management architecture and microarchitecture features for Intel's next generation IA-32 microprocessor and SoCs. Your responsibilities will include but not be limited to: - Analyzing existing developed Power management architecture and microarchitecture, understanding and gathering new requirements, developing new algorithms or changes required, documenting for review and communication, creating and negotiating feature development plans, writing code, and debugging that code for functionality, power and performance requirements - Developing, modeling and implementing brand new Power Management microarchitecture features - Tuning existing implementation of Power management features - Interacting and communicating with architecture, design, and validation teams to achieve goals - Supporting business groups and customers as needed to deliver products to market.


Minimum Qualifications :- Must have an MS or PhD in Computer Engineering, Electrical Engineering or Computer Science (will also consider candidates with a BS degree with a minimum of 5 years of experience on SoC/Computer Architecture, performance, or power ) - Minimum 2 years of experience on SoC/Computer Architecture, performance, or power is required- Proven ability to work and influence across organizational boundaries. - Strong analytical ability and creativity in finding solutions to hard problems. - Excellent communication skills - Thorough understanding of microprocessor power, performance and modeling. - Thorough understanding of the software and operating system environment - Thorough understanding of RTL implementation of microarchitecture features and related power and area trade-offs. - Thorough understanding of low power design and CPU power management. - Willingness to work in a competitive team environment Preferred Qualifications: - Assembly programming language experience - Experience with Intel Architecture (x86) very strongly preferred- Experience with object oriented programming skills, software development and debugging skills - Experience in RTL Design or Design Validation tools, methodologies and automation. - Experience with UNIX command-line tools and development environments

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
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