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Job ID: JR0810061
Job Category: Engineering
Primary Location: Folsom, CA US
Other Locations:
Job Type: Experienced Hire

Senior Verification Engineer

Job Description
If you're interested in computer graphics and working with leading graphics software engineers on Intel's latest GPU/CPU architecture, then our Visual and Parallel Computing Group (VPG) has opportunities for you. VPG delivers Intel's 3D graphics, media, display GPU, and Parallel Computing Technology. We have a position for a Senior Verification Engineer. In this position, you will be playing a key role in the pre-silicon validation of Intel's leading edge integrated graphics CPU products, with focus on integration validation of the graphics core. where you will be working closely within a team of graphics hardware design/validation engineers, micro-architects, and architects on 3D Graphics blocks (subsystems) targeting a wide range of Intel's future generation processor products. The development environment is dynamic and fast-moving, focused on high-quality results, frequently entailing multiple projects under concurrent development. You will be encouraged to take informed risks, to continuously seek useful design innovations and process improvements, and to have fun while doing so. This position is based in Folsom, CA, whence you will be collaborating with team members and other key partners located across multiple US and international sites. Job Description: Ensures platform and its components have the best performance and power balance specifically focusing on graphics hardware components. Research and development of next generation platform designs to continually improve the performance. Conducts system analysis on proprietary and competition platforms, develops advanced hardware tuning and overclocking.


Qualifications

Minimum Qualifications: You must possess a Bachelor's degree with 7 years' experience, or a Master's degree with 5 years' experience. Degree should be in Computer Engineering, Electrical Engineering, or related field. Candidate should have 5+ years of experience in the following areas: - Very strong background in logic verification with a good understanding of logic design concepts - Expertise in Verilog*, System Verilog*, AVM*/OVM*, Perl scripting, and VCS* simulator -Some of the prior experience has to be in the field of emulation -Logic design skills and thorough understanding at gate level -Strong experience in debugging at the system level -Strong understanding of Register Transfer Level (RTL) design, both at the logic level (RTL) - Expertise in functional coverage concepts/implementation - Strong experience with testplan/testbench and test writing/debug - Working knowledge of UNIX*, and Windows* - Familiarity with the ASIC design flow and working knowledge of 3D Graphics

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.


Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
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