Inside this Business Group
Minimum qualifications and experience:Bachelor’s in in EE and/or CS Engineering or related field plus 6 years of relevant experience. A Master’s degree is preferred.Candidate should have 6+ years of experience with the following:• Solid experience with HVL’s like SystemVerilog, or Specman • Familiarity with OOP’s concepts and OVM/UVM methodologies • Hands on experience with coding and developing testbench components like BFM’s, Monitors and Checkers/Scoreboards. • Good understanding of overall Validation flows tools • Familiarity with Functional Coverage, Code Coverage Assertions concepts methodologies • Preferable but not desired, is some familiarity/experience with Formal Property Verification flows/tools • Possesses good problem-solving, communication, and interpersonal skills Preferred Qualifications and experience:• Knowledge Cache based designs Cache Coherency flows is a big plus • Experience with Perl, Shell scripting, Makefiles, TCL a plus
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.