Apply Now    
Job ID: JR0011529
Job Category: Engineering
Primary Location: Bangalore, KA IN
Other Locations:
Job Type: Experienced Hire

SOC Lead Design Engineer

Job Description

In this position, candidate will be responsible to lead the design team and be interface with Front-end team to resolve the RTL related issues. 
This includes, drive the team to resolve issues in RTL2GDS flow like, Logic synthesis, FEV, Block level floor-planning, Place & Route, clock generation, LVS & DRC cleanup, static timing, Electrical Rule Fixes and Quality fixes. 
Candidate will also be involved to interact with Full Chip Timing (FCT) team on timing issues and drive the RLS team for the blocks closure. 
You will also be responsible to drive the methodology development in critical design issues, troubleshoots a wide variety up to and including difficult design issues and applied proactive intervention. 
In addition, be self-motivated with the initiative to seek constant improvements in the physical design methodologies. 
The candidate must also possess strong initiative, analytical/problem solving skills, team working skills, ability to multitask and be able to work within a diverse team environment


Qualifications

• Job Description
In this position, candidate will be leading a team of physical design engineer responsible for physical design implementation of partitions/blocks/Hard Macros.
This includes, interacting with RTL/Design team to define right synthesis recipe, cleanup logic equivalence checks, Block level floor-planning, Place & Route, CTS, Timing convergence/STA activities, LVS & DRC cleanup, Electrical Rule Fixes and Quality fixes. In addition, candidate will be responsible for planning convergence milestones and be responsible for team deliverables.

You will also be responsible to drive the methodology development in critical design issues, troubleshoots a wide variety up to and including difficult design issues and applied proactive intervention.
In addition, be self-motivated with the initiative to seek constant improvements in the physical design methodologies.
The candidate must also possess strong initiative, analytical/problem solving skills, team working skills, ability to multitask and be able to work within a diverse team environment

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

Apply Now    

What would you like to do now?

Connect with Us

Get Job Alerts

Get started
Student Center

Find out more about working at Intel

Learn more
Hiring Process

Hiring Process

Learn more

Grow your network of opportunities