Come join Intel's Manufacturing Validation Engineering MVE organization within Platform Engineering Group PEG as Senior Product Development Engineer on In-Package Memory IPM products.
In this role, you will be expected to be a part of and participate in global PDE team in the validation and certification of Intel IPM products with state of the art memory, SOC, and assembly technologies, to enable Intel's product roadmap in data center and client product segments.
Responsible for ensuring the testability and manufacturability of integrated circuits from the component feasibility stage through production ramp.
Make significant contributions to design, development and validation of testability circuits. Evaluation, development and debug of complex test methods.
Develops and debugs complex software programs to convert design validation vectors and drive complex test equipment.
Creates and tests validation and production test hardware solutions.
Tests, validates, modifies and redesigns circuits to guarantee component margin to specification
Analyzes and evaluates component specification versus performance to ensure optimal match of component requirements with production equipment capability with specific emphasis on yield analysis and bin split capability.
Analyzes early customer returns with emphasis on driving test hole closure activities.
Creates and applies concepts for optimizing component production relative to both quality and cost constraints.
Autonomously plans and schedules own daily tasks, develops solutions to problems utilizing formal education and judgment.
Bachelor or Master of Science degree in Electrical Engineering/Computer Engineering/Computer Science
5-7 years of product development engineering/post-silicon validation experience, preferably in memory array testing, either at ATE or system level
5 years or more of Software background & programming skills C, C++, Perl, Python
4 years or more of experience in the application of semiconductor device physics knowledge, fundamentals of testing, digital electronics principles, microprocessor basics, basics of VLSI design, assembly language programming, computer architecture, data structures, statistical data analysis, memory devices architecture and testing
Knowledge of computer system architecture and understanding of subsystem HW/SW stack, including silicon, hardware components, connectors and device drivers, and applications
Applicants MUST have a legal right to work in the US without sponsorship
In addition to the required minimum qualifications, the ideal candidate would have most or all of the following skills:
Problem solving with sound logical thinking and analysis
Ability to multitask -Excellent communication skills, verbal and written
Prior experience in memory device testing on ATE or system/platform
Prior experience/exposure to high volume manufacturing
Specific responsibilities of this position include, but are not limited to, the following:
Application of Intel CPU/chipset architecture knowledge to practical debug on system/platform level, with command over use of instrumentation such as logic analyzers, oscilloscopes, protocol analyzers, in-target probes ITP, and Lauterbach LTB-DFx and test methodology definition and validation
Development of test content for memory arrays
Debug and enabling of memory array content
Data analysis and deployment of solutions to improve test coverage, yield, hardware capacity, and other product health indicators
Strong participation and active contribution to global working groups dedicated to identifying and meeting current and future test challenges for system-in-package SIP form factor.
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.