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Job ID: JR0007965
Job Category: Engineering
Primary Location: Santa Clara, CA US
Other Locations:
Job Type: Experienced Hire

Product Development Engineer

Job Description

Responsible for ensuring the testability and manufacturability of integrated circuits from the component feasibility stage through production ramp. Make significant contributions to design, development and validation of testability circuits. Evaluation, development and debug of complex test methods. Develops and debugs complex software programs to convert design validation vectors and drive complex test equipment. Creates and tests validation and production test hardware solutions. Tests, validates, modifies and redesigns circuits to guarantee component margin to specification. Analyzes and evaluates component specification versus performance to ensure optimal match of component requirements with production equipment capability with specific emphasis on yield analysis and bin split capability. Analyzes early customer returns with emphasis on driving test hole closure activities. Creates and applies concepts for optimizing component production relative to both quality and cost constraints. Autonomously plans and schedules own daily tasks, develops solutions to problems utilizing formal education and judgment.


Qualifications

Come join Intel's Manufacturing Validation Engineering MVE organization within Platform Engineering Group PEG as Product Development Engineer on In-Package Memory IPM products. In this role, you will be expected to be a part of and participate in global PDE team in the validation and certification of Intel IPM products with state of the art memory, SOC, and assembly technologies, to enable Intel's product roadmap in data center and client product segments.

Minimum Qualifications:
Bachelor or Master of Science Degree in Electrical Engineering/Computer Engineering/Computer Science.
2+ years of Product Development Engineering Experience. (Preferably in Memory Array Testing, either at ATE or System Level)
2+ years of experience in Semiconductor Device Physics, Fundamentals of Testing, Digital Electronics Principles, Microprocessor Basics, Basics of VLSI Design, Assembly Language Programming, Computer Architecture, Data Structures, Statistical Data Analysis, Memory Devices Architecture and Testing.
4+ years with Software Background experience.
4+ years of experience with Programming Skills in C++, Perl, Python/any Scripting Language.

Preferred Qualifications:
Prior experience in memory device testing on ATE or system/platform level.
Prior experience/exposure to high volume manufacturing.

Specific responsibilities of this position include, but are not limited to, the following:
DFx and test methodology definition and validation.
Development of test content for memory arrays.
Debug and enabling of memory array content.
Data analysis and deployment of solutions to improve test coverage, yield, hardware capacity, and other product health indicators.
Strong participation and active contribution to global working groups dedicated to identifying and meeting current and future test challenges for system-in-package SIP form factor.
Problem solving with sound logical thinking and analysis.
Ability to multitask.
Excellent communication skills, verbal and written.

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.


Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
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