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Job ID: JR0007184
Job Category: Intern/Student
Primary Location: Guadalajara, JAL MX
Other Locations:
Job Type: Intern

Post-Si validation Intern

Job Description
In this position, your responsibilities will include but not be limited to: - Collaborate with other engineers to pursue the system validation and debug of microprocessors, chipsets and SoCs for the Server market. Interact with other validation areas, chip Design, BIOS, platform development and other different teams to support development, data collection, debug, analysis, documentation and reporting.- Apply analog and digital electronics to debug technical problems Help with development of automation in execution & debug by using your SW skills for programming and scripting. - Work with Hardware validation engineer and Designers. - Review the procedures and methodologies for the areas listed previously in order to improve efficiency and find better tools and innovative validation strategies.


Qualifications

You should be a student currently pursuing a relevant course of studies, preferably last semesters of Bachelor or Master of Science in Electronics or Computer Engineering. Additional qualifications include:-Strong knowledge of Computer Architecture and logic circuits. Good SW skills in programming/scripting languages. Experience in Python or similar is a Plus.-Familiar with the use of lab instruments such as logic analyzers and osciloscopes. Problem analysis and problem solving skills.- Excellent verbal and written communication skills English and Spanish- General knowledge of operating systems like Linux and Windows. Capable of working as part of a team and interacting with people located in different geographies.

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

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