Senior Design Verification Engineer-Intel Contract Employee

This is an Intel Contract Employee Position.

This opportunity is for a Pre-silicon functional validation engineer as an Intel Contract Employee with EIG team in Santa Clara, CA-part of the Platform Engineering Group

Responsibilities include but are not limited to: Creates test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests. Analyzes and uses results to modify testing.

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through relevant previous jobs and/or research experiences.

Minimum Qualifications:

• Candidate should possess a Bachelor's in Electrical Engineering or Computer Science with 7 years and/or a Master's degree in Electrical Engineering or Computer Science or similar degree with 5 years of relevant industry experience.
• Extensive knowledge of System Verilog and working knowledge of verification methodologies like OVM and UVM.
• Good knowledge of reuse concepts.
• Adept in programming and/or scripting with C++.

Qualifications

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.