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Job ID: R10009713
Job Category: Engineering
Primary Location: San Jose, CA US
Other Locations:
Job Type: Conversion

Senior Layout Design Engineer

Job Description
  • As a Layout Designer, you will:
    • Create bottoms-up elements of chip design including but not limited to FET, cell, and block-level custom layouts, FUB-level floor plans, abstract view generation, RC extraction and schematic-to-layout verification and debug using phases of physical design development including parasitic extraction, static timing, wire load models, clock generation, custom polygon editing, auto-place and route algorithms, floor planning, full-chip assembly, packaging, and verification.
    • Troubleshoots a wide variety up to and including difficult design issues and applied proactive intervention.
    • Schedules, staffs, executes and verifies complex chips development and execution of project methodologies and/or flow developments.
    • Requires expansive knowledge and practical application of methodologies and physical design.


Qualifications

The successful candidate's minimum qualifications will include the following:
o BS Electrical Engineering or equivalent with a minimum of 10 years applicable experience
o Experience enabling a semi-custom design flow within the Cadence environment desired

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.


Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
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